Manoj Sachdev

M S.

titlemedia typeISBN-13year of publica-
tion
other author(s)
CMOS SRAM Circuit Design and Parametric Test in Nano-Scaled Technologies: Process-Aware SRAM Design and TestPaperback978-90-481-7855-12010Andrei Pavlov
CMOS SRAM Circuit Design and Parametric Test in Nano-Scaled Technologies: Process-Aware SRAM Design and TestHardcover978-1-4020-8362-42008   "
Defect Oriented Testing for CMOS Analog and Digital Circuits   "978-0-7923-8083-21997
Defect-Oriented Testing for Nano-Metric CMOS VLSI CircuitsPaperback978-1-4419-4285-22010José Pineda de Gyvez
Defect-Oriented Testing for Nano-Metric CMOS VLSI CircuitsBroschiert978-0-387-51653-02008Jos Pineda De Gyvez
Defect-Oriented Testing for Nano-Metric CMOS VLSI CircuitsHardcover978-0-387-46546-32007José Pineda de Gyvez
ESD Protection Device and Circuit Design for Advanced CMOS TechnologiesPaperback978-90-481-7836-02010Oleg Semenov · Hossein Sarbishaei
ESD Protection Device and Circuit Design for Advanced CMOS TechnologiesHardcover978-1-4020-8300-62008Oleg Semenov · Hossein Sarbishaei
Thermal and Power Management of Integrated Circuits   "978-0-387-25762-42006Arman Vassighi

Manoj Saxena