Vaibbhav Taraate

V. T.

titlemedia typeISBN-13year of publication
Advanced HDL Synthesis and SOC Prototyping: RTL Design Using VerilogHardcover978-981-10-8775-22018
Digital Logic Design Using Verilog: Coding and RTL SynthesisPaperback978-81-322-3838-62018
Digital Logic Design Using Verilog: Coding and RTL SynthesisHardcover978-81-322-2789-22016
Logic Synthesis and SOC Prototyping: RTL Design using VHDL   "978-981-15-1313-82020
PLD Based Design with VHDL: RTL Design, Synthesis and ImplementationPaperback978-981-10-9836-92018
PLD Based Design with VHDL: RTL Design, Synthesis and ImplementationHardcover978-981-10-3294-32017

Vaibhav Tripathi