José Monteiro

Titel ISBN-13
(ISBN-10)
Erschei-
nungsjahr
andere Autoren
Computer-Aided Design Techniques for Low Power Sequential Logic Circuits
978-0-7923-9829-5
(0-7923-9829-7)
1996Srinivas Devadas
Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation: 18th International Workshop, PATMOS 2008, Lisbon, ... Notes in Computer Science , Band 5349) 978-3-540-95947-2
(3-540-95947-5)
2010Lars Svensson
Integrated Circuit and System Design: Power and Timing Modeling, Optimization and Simulation: 19th International Workshop, PATMOS 2009, Delft, The ... Notes in Computer Science, Band 5953) 978-3-642-11801-2
(3-642-11801-1)
2010Jose Monteiro

J.M. · José Gomes Monteiro · José Jorge Monteiro · Jose M. · José Maviael Monteiro · Jose Paulo Monteiro · José Pedro Monteiro

Jose Montelongo