Heinrich Meyr

H. M. · H Meyr

Springer · Wiley

titleISBN-13year of publica-
tion
other author(s)
Digital Communication Receivers, Synchronization, Channel Estimation, and Signal Processing978-0-471-50275-31997Marc Moeneclaey · Stefan A. Fechtel
Integrated System-Level Modeling of Network-on-Chip enabled Multi-Processor Platforms978-1-4020-4825-82006Tim Kogel · Rainer Leupers
Language-driven Exploration and Implementation of Partially Re-configurable ASIPs978-1-4020-9296-12008Anupam Chattopadhyay · Rainer Leupers · Gerd Ascheid
Optimized ASIP Synthesis from Architecture Description Language Models978-1-4020-5685-72007Oliver Schliebusch · Rainer Leupers
Retargetable Processor System Integration into Multi-Processor System-on-Chip Platforms978-1-4020-8574-12008Andreas Wieferink · Rainer Leupers
Synchronization in Digital Communication Volume I, Phase-, Frequency-Locked Loops, and Amplitude Control978-0-471-50193-01990Gerd Ascheid

 

Heinrich Michelant