Eduard Cerny

title ISBN-13year of publica-
tion
other author(s)
Hardware Description Languages and their Applications: Specification, modelling, verification and synthesis of microelectronic systems
978-0-412-78810-91997Carlos Delgado Kloos
Hierarchical Annotated Action Diagrams: An Interface-Oriented Specification and Verification Method
978-0-7923-8301-71998Bachir Berkane · Pierre Girodias · Karim Khordoc
SVA: The Power of Assertions in SystemVerilog
978-3-319-07138-12014Surrendra Dudani · John Havlicek · Dmitry Korchemny
Verification Methodology Manual for Systemverilog
978-0-387-50645-62008Janick Bergeron · Alan Hunter
Verification Methodology Manual for SystemVerilog
978-0-387-25538-52005Janick Bergeron · Alan Hunter · Andy Nightingale
ベリフィケーション・メソドロジ・マニュアル―SystemVerilogでLSI機能検証プロセスを徹底改善
be­rifuikeーshon・me­sodoroji・ma­nyuaru―SystemVeri­logdeLSIki­noukenshoupurosesuwotetteikaizen
 978-4-7898-3615-92006Janick Bergeron · Alan Hunter · Andrew Nightingale

E C. · Eduardo Corona · Edward Cairney · Edward Carini · Edward Carney · Edward Corwin

CQ出版 (CQshuppan) · Chapman and Hall · Springer

 

Eduard Ch Heinisch